STRLCPY/CatSniffer

erase extra files
Eduardo committed 2 years ago

0f9fb5e4

1 parent deabc466

Revision indexing in progress... (symbol navigation in revisions will be accurate after indexed)

■ ■ ■ ■ ■ ■

hardware/CC1352P1F3RGZT/CC1352P1F3RGZT.lib

1	-	EESchema-LIBRARY Version 2.3
2	-	#encoding utf-8
3	-	#(c) SnapEDA 2016 (snapeda.com)
4	-	#This work is licensed under a Creative Commons Attribution-ShareAlike 4.0 International License (CC BY-SA) with Design Exception 1.0
5	-	#
6	-	# CC1352P1F3RGZT
7	-	#
8	-	DEF CC1352P1F3RGZT U 0 40 Y Y 1 L N
9	-	F0 "U" -700 2339 50 H V L BNN
10	-	F1 "CC1352P1F3RGZT" -700 -2457 50 H V L BNN
11	-	F2 "QFN50P700X700X100-49N" 0 0 50 H I L BNN
12	-	F3 "" 0 0 50 H I L BNN
13	-	F4 "SimpleLink Arm Cortex-M4F multiprotocol Sub 1 GHz & 2.4 GHz wireless MCU integrated power amplifier 48-VQFN -40 to 85" 0 0 50 H I L BNN "Description"
14	-	F5 "In Stock" 0 0 50 H I L BNN "Availability"
15	-	F6 "Texas Instruments" 0 0 50 H I L BNN "MF"
16	-	F7 "None" 0 0 50 H I L BNN "Price"
17	-	F8 "https://pricing.snapeda.com/search/part/CC1352P1F3RGZT/?ref=eda" 0 0 50 H I L BNN "Purchase-URL"
18	-	F9 "CC1352P1F3RGZT" 0 0 50 H I L BNN "MP"
19	-	F10 "VQFN-48 Texas Instruments" 0 0 50 H I L BNN "Package"
20	-	DRAW
21	-	S -700 -2300 700 2300 0 0 16 f
22	-	X ~RESET_N 35 -900 1400 200 R 40 40 0 0 I
23	-	X JTAG_TCKC 25 -900 1300 200 R 40 40 0 0 I
24	-	X DCOUPL 23 -900 1000 200 R 40 40 0 0 B
25	-	X DIO_5 10 -900 800 200 R 40 40 0 0 B
26	-	X DIO_6 11 -900 700 200 R 40 40 0 0 B
27	-	X DIO_7 12 -900 600 200 R 40 40 0 0 B
28	-	X DIO_8 14 -900 500 200 R 40 40 0 0 B
29	-	X DIO_9 15 -900 400 200 R 40 40 0 0 B
30	-	X DIO_10 16 -900 300 200 R 40 40 0 0 B
31	-	X DIO_11 17 -900 200 200 R 40 40 0 0 B
32	-	X DIO_12 18 -900 100 200 R 40 40 0 0 B
33	-	X DIO_13 19 -900 0 200 R 40 40 0 0 B
34	-	X DIO_14 20 -900 -100 200 R 40 40 0 0 B
35	-	X DIO_15 21 -900 -200 200 R 40 40 0 0 B
36	-	X DIO_16 26 -900 -300 200 R 40 40 0 0 B
37	-	X DIO_17 27 -900 -400 200 R 40 40 0 0 B
38	-	X JTAG_TMSC 24 -900 -600 200 R 40 40 0 0 B
39	-	X RF_N_2_4GHZ 2 -900 -800 200 R 40 40 0 0 B
40	-	X RF_N_SUB_1GHZ 4 -900 -1000 200 R 40 40 0 0 B
41	-	X RF_P_2_4GHZ 1 -900 -1200 200 R 40 40 0 0 B
42	-	X RF_P_SUB_1GHZ 3 -900 -1400 200 R 40 40 0 0 B
43	-	X RX_TX 7 -900 -1600 200 R 40 40 0 0 B
44	-	X X32K_Q1 8 -900 -1800 200 R 40 40 0 0 B
45	-	X X32K_Q2 9 -900 -1900 200 R 40 40 0 0 B
46	-	X EGP 49 900 2200 200 L 40 40 0 0 W
47	-	X EGP 49_1 900 2200 200 L 40 40 0 0 W
48	-	X EGP 49_2 900 2200 200 L 40 40 0 0 W
49	-	X EGP 49_3 900 2200 200 L 40 40 0 0 W
50	-	X EGP 49_4 900 2200 200 L 40 40 0 0 W
51	-	X EGP 49_5 900 2200 200 L 40 40 0 0 W
52	-	X EGP 49_6 900 2200 200 L 40 40 0 0 W
53	-	X EGP 49_7 900 2200 200 L 40 40 0 0 W
54	-	X EGP 49_8 900 2200 200 L 40 40 0 0 W
55	-	X EGP 49_9 900 2200 200 L 40 40 0 0 W
56	-	X EGP 49_10 900 2200 200 L 40 40 0 0 W
57	-	X EGP 49_11 900 2200 200 L 40 40 0 0 W
58	-	X EGP 49_12 900 2200 200 L 40 40 0 0 W
59	-	X EGP 49_13 900 2200 200 L 40 40 0 0 W
60	-	X EGP 49_14 900 2200 200 L 40 40 0 0 W
61	-	X EGP 49_15 900 2200 200 L 40 40 0 0 W
62	-	X EGP 49_16 900 2200 200 L 40 40 0 0 W
63	-	X EGP 49_17 900 2200 200 L 40 40 0 0 W
64	-	X EGP 49_18 900 2200 200 L 40 40 0 0 W
65	-	X EGP 49_19 900 2200 200 L 40 40 0 0 W
66	-	X EGP 49_20 900 2200 200 L 40 40 0 0 W
67	-	X EGP 49_21 900 2200 200 L 40 40 0 0 W
68	-	X VDDR 45 900 2100 200 L 40 40 0 0 W
69	-	X VDDR_RF 48 900 2000 200 L 40 40 0 0 W
70	-	X VDDS 44 900 1900 200 L 40 40 0 0 W
71	-	X VDDS2 13 900 1800 200 L 40 40 0 0 W
72	-	X VDDS3 22 900 1700 200 L 40 40 0 0 W
73	-	X VDDS_DCDC 34 900 1600 200 L 40 40 0 0 W
74	-	X DCDC_SW 33 900 1400 200 L 40 40 0 0 O
75	-	X TX_20DBM_N 6 900 1300 200 L 40 40 0 0 O
76	-	X TX_20DBM_P 5 900 1200 200 L 40 40 0 0 O
77	-	X DIO_18 28 900 900 200 L 40 40 0 0 B
78	-	X DIO_19 29 900 800 200 L 40 40 0 0 B
79	-	X DIO_20 30 900 700 200 L 40 40 0 0 B
80	-	X DIO_21 31 900 600 200 L 40 40 0 0 B
81	-	X DIO_22 32 900 500 200 L 40 40 0 0 B
82	-	X DIO_23 36 900 400 200 L 40 40 0 0 B
83	-	X DIO_24 37 900 300 200 L 40 40 0 0 B
84	-	X DIO_25 38 900 200 200 L 40 40 0 0 B
85	-	X DIO_26 39 900 100 200 L 40 40 0 0 B
86	-	X DIO_27 40 900 0 200 L 40 40 0 0 B
87	-	X DIO_28 41 900 -100 200 L 40 40 0 0 B
88	-	X DIO_29 42 900 -200 200 L 40 40 0 0 B
89	-	X DIO_30 43 900 -300 200 L 40 40 0 0 B
90	-	X X48M_N 46 900 -1700 200 L 40 40 0 0 B
91	-	X X48M_P 47 900 -1800 200 L 40 40 0 0 B
92	-	ENDDRAW
93	-	ENDDEF
94	-	#
95	-	# End Library

■ ■ ■ ■ ■ ■

hardware/CC1352P1F3RGZT/CC1352P1F3RGZT.mod

1	-	PCBNEW-LibModule-V1
2	-	# encoding utf-8
3	-	Units mm
4	-	$INDEX
5	-	QFN50P700X700X100-49N
6	-	$EndINDEX
7	-	$MODULE QFN50P700X700X100-49N
8	-	Po 0 0 0 15 00000000 00000000 ~~
9	-	Li QFN50P700X700X100-49N
10	-	Cd
11	-	Sc 00000000
12	-	At SMD
13	-	Op 0 0 0
14	-	.SolderMask 0
15	-	.SolderPaste 0
16	-	T0 -1.46 -5.135 1 1 0 0.05 N V 21 "QFN50P700X700X100-49N"
17	-	T1 -0.825 5.135 1 1 0 0.05 N V 21 "VAL**"
18	-	DC -4.475 -2.75 -4.375 -2.75 0.2 21
19	-	DC -4.475 -2.75 -4.375 -2.75 0.2 27
20	-	DS 3.5 3.5 -3.5 3.5 0.127 27
21	-	DS 3.5 -3.5 -3.5 -3.5 0.127 27
22	-	DS 3.5 3.5 3.5 -3.5 0.127 27
23	-	DS -3.5 3.5 -3.5 -3.5 0.127 27
24	-	DS 3.5 3.5 3.2 3.5 0.127 21
25	-	DS 3.5 -3.5 3.2 -3.5 0.127 21
26	-	DS -3.5 3.5 -3.2 3.5 0.127 21
27	-	DS -3.5 -3.5 -3.2 -3.5 0.127 21
28	-	DS 3.5 3.5 3.5 3.2 0.127 21
29	-	DS 3.5 -3.5 3.5 -3.2 0.127 21
30	-	DS -3.5 3.5 -3.5 3.2 0.127 21
31	-	DS -3.5 -3.5 -3.5 -3.2 0.127 21
32	-	DS -4.115 4.115 4.115 4.115 0.05 26
33	-	DS -4.115 -4.115 4.115 -4.115 0.05 26
34	-	DS -4.115 4.115 -4.115 -4.115 0.05 26
35	-	DS 4.115 4.115 4.115 -4.115 0.05 26
36	-	DP 0 0 0 0 4 0 19
37	-	Dl -2.1 -2.1
38	-	Dl -0.48 -2.1
39	-	Dl -0.48 -0.48
40	-	Dl -2.1 -0.48
41	-	DP 0 0 0 0 4 0 19
42	-	Dl 0.48 -2.1
43	-	Dl 2.1 -2.1
44	-	Dl 2.1 -0.48
45	-	Dl 0.48 -0.48
46	-	DP 0 0 0 0 4 0 19
47	-	Dl -2.1 0.48
48	-	Dl -0.48 0.48
49	-	Dl -0.48 2.1
50	-	Dl -2.1 2.1
51	-	DP 0 0 0 0 4 0 19
52	-	Dl 0.48 0.48
53	-	Dl 2.1 0.48
54	-	Dl 2.1 2.1
55	-	Dl 0.48 2.1
56	-	$PAD
57	-	Sh "13" R 0.86 0.26 0 0 900
58	-	At SMD N 00088000
59	-	.SolderMask 0
60	-	.SolderPaste 0
61	-	Ne 0 ""
62	-	Po -2.75 3.435
63	-	$EndPAD
64	-	$PAD
65	-	Sh "14" R 0.86 0.26 0 0 900
66	-	At SMD N 00088000
67	-	.SolderMask 0
68	-	.SolderPaste 0
69	-	Ne 0 ""
70	-	Po -2.25 3.435
71	-	$EndPAD
72	-	$PAD
73	-	Sh "15" R 0.86 0.26 0 0 900
74	-	At SMD N 00088000
75	-	.SolderMask 0
76	-	.SolderPaste 0
77	-	Ne 0 ""
78	-	Po -1.75 3.435
79	-	$EndPAD
80	-	$PAD
81	-	Sh "16" R 0.86 0.26 0 0 900
82	-	At SMD N 00088000
83	-	.SolderMask 0
84	-	.SolderPaste 0
85	-	Ne 0 ""
86	-	Po -1.25 3.435
87	-	$EndPAD
88	-	$PAD
89	-	Sh "17" R 0.86 0.26 0 0 900
90	-	At SMD N 00088000
91	-	.SolderMask 0
92	-	.SolderPaste 0
93	-	Ne 0 ""
94	-	Po -0.75 3.435
95	-	$EndPAD
96	-	$PAD
97	-	Sh "18" R 0.86 0.26 0 0 900
98	-	At SMD N 00088000
99	-	.SolderMask 0
100	-	.SolderPaste 0
101	-	Ne 0 ""
102	-	Po -0.25 3.435
103	-	$EndPAD
104	-	$PAD
105	-	Sh "19" R 0.86 0.26 0 0 900
106	-	At SMD N 00088000
107	-	.SolderMask 0
108	-	.SolderPaste 0
109	-	Ne 0 ""
110	-	Po 0.25 3.435
111	-	$EndPAD
112	-	$PAD
113	-	Sh "20" R 0.86 0.26 0 0 900
114	-	At SMD N 00088000
115	-	.SolderMask 0
116	-	.SolderPaste 0
117	-	Ne 0 ""
118	-	Po 0.75 3.435
119	-	$EndPAD
120	-	$PAD
121	-	Sh "21" R 0.86 0.26 0 0 900
122	-	At SMD N 00088000
123	-	.SolderMask 0
124	-	.SolderPaste 0
125	-	Ne 0 ""
126	-	Po 1.25 3.435
127	-	$EndPAD
128	-	$PAD
129	-	Sh "22" R 0.86 0.26 0 0 900
130	-	At SMD N 00088000
131	-	.SolderMask 0
132	-	.SolderPaste 0
133	-	Ne 0 ""
134	-	Po 1.75 3.435
135	-	$EndPAD
136	-	$PAD
137	-	Sh "23" R 0.86 0.26 0 0 900
138	-	At SMD N 00088000
139	-	.SolderMask 0
140	-	.SolderPaste 0
141	-	Ne 0 ""
142	-	Po 2.25 3.435
143	-	$EndPAD
144	-	$PAD
145	-	Sh "24" R 0.86 0.26 0 0 900
146	-	At SMD N 00088000
147	-	.SolderMask 0
148	-	.SolderPaste 0
149	-	Ne 0 ""
150	-	Po 2.75 3.435
151	-	$EndPAD
152	-	$PAD
153	-	Sh "37" R 0.86 0.26 0 0 900
154	-	At SMD N 00088000
155	-	.SolderMask 0
156	-	.SolderPaste 0
157	-	Ne 0 ""
158	-	Po 2.75 -3.435
159	-	$EndPAD
160	-	$PAD
161	-	Sh "38" R 0.86 0.26 0 0 900
162	-	At SMD N 00088000
163	-	.SolderMask 0
164	-	.SolderPaste 0
165	-	Ne 0 ""
166	-	Po 2.25 -3.435
167	-	$EndPAD
168	-	$PAD
169	-	Sh "39" R 0.86 0.26 0 0 900
170	-	At SMD N 00088000
171	-	.SolderMask 0
172	-	.SolderPaste 0
173	-	Ne 0 ""
174	-	Po 1.75 -3.435
175	-	$EndPAD
176	-	$PAD
177	-	Sh "40" R 0.86 0.26 0 0 900
178	-	At SMD N 00088000
179	-	.SolderMask 0
180	-	.SolderPaste 0
181	-	Ne 0 ""
182	-	Po 1.25 -3.435
183	-	$EndPAD
184	-	$PAD
185	-	Sh "41" R 0.86 0.26 0 0 900
186	-	At SMD N 00088000
187	-	.SolderMask 0
188	-	.SolderPaste 0
189	-	Ne 0 ""
190	-	Po 0.75 -3.435
191	-	$EndPAD
192	-	$PAD
193	-	Sh "42" R 0.86 0.26 0 0 900
194	-	At SMD N 00088000
195	-	.SolderMask 0
196	-	.SolderPaste 0
197	-	Ne 0 ""
198	-	Po 0.25 -3.435
199	-	$EndPAD
200	-	$PAD
201	-	Sh "43" R 0.86 0.26 0 0 900
202	-	At SMD N 00088000
203	-	.SolderMask 0
204	-	.SolderPaste 0
205	-	Ne 0 ""
206	-	Po -0.25 -3.435
207	-	$EndPAD
208	-	$PAD
209	-	Sh "44" R 0.86 0.26 0 0 900
210	-	At SMD N 00088000
211	-	.SolderMask 0
212	-	.SolderPaste 0
213	-	Ne 0 ""
214	-	Po -0.75 -3.435
215	-	$EndPAD
216	-	$PAD
217	-	Sh "45" R 0.86 0.26 0 0 900
218	-	At SMD N 00088000
219	-	.SolderMask 0
220	-	.SolderPaste 0
221	-	Ne 0 ""
222	-	Po -1.25 -3.435
223	-	$EndPAD
224	-	$PAD
225	-	Sh "46" R 0.86 0.26 0 0 900
226	-	At SMD N 00088000
227	-	.SolderMask 0
228	-	.SolderPaste 0
229	-	Ne 0 ""
230	-	Po -1.75 -3.435
231	-	$EndPAD
232	-	$PAD
233	-	Sh "47" R 0.86 0.26 0 0 900
234	-	At SMD N 00088000
235	-	.SolderMask 0
236	-	.SolderPaste 0
237	-	Ne 0 ""
238	-	Po -2.25 -3.435
239	-	$EndPAD
240	-	$PAD
241	-	Sh "48" R 0.86 0.26 0 0 900
242	-	At SMD N 00088000
243	-	.SolderMask 0
244	-	.SolderPaste 0
245	-	Ne 0 ""
246	-	Po -2.75 -3.435
247	-	$EndPAD
248	-	$PAD
249	-	Sh "1" R 0.86 0.26 0 0 0
250	-	At SMD N 00088000
251	-	.SolderMask 0
252	-	.SolderPaste 0
253	-	Ne 0 ""
254	-	Po -3.435 -2.75
255	-	$EndPAD
256	-	$PAD
257	-	Sh "2" R 0.86 0.26 0 0 0
258	-	At SMD N 00088000
259	-	.SolderMask 0
260	-	.SolderPaste 0
261	-	Ne 0 ""
262	-	Po -3.435 -2.25
263	-	$EndPAD
264	-	$PAD
265	-	Sh "3" R 0.86 0.26 0 0 0
266	-	At SMD N 00088000
267	-	.SolderMask 0
268	-	.SolderPaste 0
269	-	Ne 0 ""
270	-	Po -3.435 -1.75
271	-	$EndPAD
272	-	$PAD
273	-	Sh "4" R 0.86 0.26 0 0 0
274	-	At SMD N 00088000
275	-	.SolderMask 0
276	-	.SolderPaste 0
277	-	Ne 0 ""
278	-	Po -3.435 -1.25
279	-	$EndPAD
280	-	$PAD
281	-	Sh "5" R 0.86 0.26 0 0 0
282	-	At SMD N 00088000
283	-	.SolderMask 0
284	-	.SolderPaste 0
285	-	Ne 0 ""
286	-	Po -3.435 -0.75
287	-	$EndPAD
288	-	$PAD
289	-	Sh "6" R 0.86 0.26 0 0 0
290	-	At SMD N 00088000
291	-	.SolderMask 0
292	-	.SolderPaste 0
293	-	Ne 0 ""
294	-	Po -3.435 -0.25
295	-	$EndPAD
296	-	$PAD
297	-	Sh "7" R 0.86 0.26 0 0 0
298	-	At SMD N 00088000
299	-	.SolderMask 0
300	-	.SolderPaste 0
301	-	Ne 0 ""
302	-	Po -3.435 0.25
303	-	$EndPAD
304	-	$PAD
305	-	Sh "8" R 0.86 0.26 0 0 0
306	-	At SMD N 00088000
307	-	.SolderMask 0
308	-	.SolderPaste 0
309	-	Ne 0 ""
310	-	Po -3.435 0.75
311	-	$EndPAD
312	-	$PAD
313	-	Sh "9" R 0.86 0.26 0 0 0
314	-	At SMD N 00088000
315	-	.SolderMask 0
316	-	.SolderPaste 0
317	-	Ne 0 ""
318	-	Po -3.435 1.25
319	-	$EndPAD
320	-	$PAD
321	-	Sh "10" R 0.86 0.26 0 0 0
322	-	At SMD N 00088000
323	-	.SolderMask 0
324	-	.SolderPaste 0
325	-	Ne 0 ""
326	-	Po -3.435 1.75
327	-	$EndPAD
328	-	$PAD
329	-	Sh "11" R 0.86 0.26 0 0 0
330	-	At SMD N 00088000
331	-	.SolderMask 0
332	-	.SolderPaste 0
333	-	Ne 0 ""
334	-	Po -3.435 2.25
335	-	$EndPAD
336	-	$PAD
337	-	Sh "12" R 0.86 0.26 0 0 0
338	-	At SMD N 00088000
339	-	.SolderMask 0
340	-	.SolderPaste 0
341	-	Ne 0 ""
342	-	Po -3.435 2.75
343	-	$EndPAD
344	-	$PAD
345	-	Sh "25" R 0.86 0.26 0 0 0
346	-	At SMD N 00088000
347	-	.SolderMask 0
348	-	.SolderPaste 0
349	-	Ne 0 ""
350	-	Po 3.435 2.75
351	-	$EndPAD
352	-	$PAD
353	-	Sh "26" R 0.86 0.26 0 0 0
354	-	At SMD N 00088000
355	-	.SolderMask 0
356	-	.SolderPaste 0
357	-	Ne 0 ""
358	-	Po 3.435 2.25
359	-	$EndPAD
360	-	$PAD
361	-	Sh "27" R 0.86 0.26 0 0 0
362	-	At SMD N 00088000
363	-	.SolderMask 0
364	-	.SolderPaste 0
365	-	Ne 0 ""
366	-	Po 3.435 1.75
367	-	$EndPAD
368	-	$PAD
369	-	Sh "28" R 0.86 0.26 0 0 0
370	-	At SMD N 00088000
371	-	.SolderMask 0
372	-	.SolderPaste 0
373	-	Ne 0 ""
374	-	Po 3.435 1.25
375	-	$EndPAD
376	-	$PAD
377	-	Sh "29" R 0.86 0.26 0 0 0
378	-	At SMD N 00088000
379	-	.SolderMask 0
380	-	.SolderPaste 0
381	-	Ne 0 ""
382	-	Po 3.435 0.75
383	-	$EndPAD
384	-	$PAD
385	-	Sh "30" R 0.86 0.26 0 0 0
386	-	At SMD N 00088000
387	-	.SolderMask 0
388	-	.SolderPaste 0
389	-	Ne 0 ""
390	-	Po 3.435 0.25
391	-	$EndPAD
392	-	$PAD
393	-	Sh "31" R 0.86 0.26 0 0 0
394	-	At SMD N 00088000
395	-	.SolderMask 0
396	-	.SolderPaste 0
397	-	Ne 0 ""
398	-	Po 3.435 -0.25
399	-	$EndPAD
400	-	$PAD
401	-	Sh "32" R 0.86 0.26 0 0 0
402	-	At SMD N 00088000
403	-	.SolderMask 0
404	-	.SolderPaste 0
405	-	Ne 0 ""
406	-	Po 3.435 -0.75
407	-	$EndPAD
408	-	$PAD
409	-	Sh "33" R 0.86 0.26 0 0 0
410	-	At SMD N 00088000
411	-	.SolderMask 0
412	-	.SolderPaste 0
413	-	Ne 0 ""
414	-	Po 3.435 -1.25
415	-	$EndPAD
416	-	$PAD
417	-	Sh "34" R 0.86 0.26 0 0 0
418	-	At SMD N 00088000
419	-	.SolderMask 0
420	-	.SolderPaste 0
421	-	Ne 0 ""
422	-	Po 3.435 -1.75
423	-	$EndPAD
424	-	$PAD
425	-	Sh "35" R 0.86 0.26 0 0 0
426	-	At SMD N 00088000
427	-	.SolderMask 0
428	-	.SolderPaste 0
429	-	Ne 0 ""
430	-	Po 3.435 -2.25
431	-	$EndPAD
432	-	$PAD
433	-	Sh "36" R 0.86 0.26 0 0 0
434	-	At SMD N 00088000
435	-	.SolderMask 0
436	-	.SolderPaste 0
437	-	Ne 0 ""
438	-	Po 3.435 -2.75
439	-	$EndPAD
440	-	$PAD
441	-	Sh "49" R 5.15 5.15 0 0 0
442	-	At SMD N 00808000
443	-	.SolderMask 0
444	-	Ne 0 ""
445	-	Po 0 0
446	-	$EndPAD
447	-	$EndMODULE QFN50P700X700X100-49N
448	-

hardware/CC1352P1F3RGZT/CC1352P1F3RGZT.step

Diff is too large to be displayed.

■ ■ ■ ■ ■ ■

hardware/CatSniffer.pro

1	-	update=16/05/2021 03:33:46 p. m.
2	-	version=1
3	-	last_client=kicad
4	-	[general]
5	-	version=1
6	-	RootSch=
7	-	BoardNm=
8	-	[cvpcb]
9	-	version=1
10	-	NetIExt=net
11	-	[eeschema]
12	-	version=1
13	-	LibDir=
14	-	[eeschema/libraries]
15	-	[pcbnew]
16	-	version=1
17	-	PageLayoutDescrFile=
18	-	LastNetListRead=
19	-	CopperLayerCount=4
20	-	BoardThickness=1.6
21	-	AllowMicroVias=0
22	-	AllowBlindVias=0
23	-	RequireCourtyardDefinitions=0
24	-	ProhibitOverlappingCourtyards=1
25	-	MinTrackWidth=0.15
26	-	MinViaDiameter=0.4
27	-	MinViaDrill=0.3
28	-	MinMicroViaDiameter=0.2
29	-	MinMicroViaDrill=0.09999999999999999
30	-	MinHoleToHole=0.25
31	-	TrackWidth1=0.25
32	-	TrackWidth2=0.2
33	-	TrackWidth3=0.25
34	-	TrackWidth4=0.29337
35	-	TrackWidth5=0.3
36	-	TrackWidth6=0.35
37	-	TrackWidth7=0.5
38	-	ViaDiameter1=0.8
39	-	ViaDrill1=0.4
40	-	ViaDiameter2=0.6
41	-	ViaDrill2=0.3
42	-	ViaDiameter3=0.8
43	-	ViaDrill3=0.4
44	-	dPairWidth1=0.2032
45	-	dPairGap1=0.25
46	-	dPairViaGap1=0.25
47	-	dPairWidth2=0.2032
48	-	dPairGap2=0.127
49	-	dPairViaGap2=0.18
50	-	SilkLineWidth=0.15
51	-	SilkTextSizeV=1
52	-	SilkTextSizeH=1
53	-	SilkTextSizeThickness=0.15
54	-	SilkTextItalic=0
55	-	SilkTextUpright=1
56	-	CopperLineWidth=0.2
57	-	CopperTextSizeV=1.5
58	-	CopperTextSizeH=1.5
59	-	CopperTextThickness=0.3
60	-	CopperTextItalic=0
61	-	CopperTextUpright=1
62	-	EdgeCutLineWidth=0.09999999999999999
63	-	CourtyardLineWidth=0.05
64	-	OthersLineWidth=0.15
65	-	OthersTextSizeV=1
66	-	OthersTextSizeH=1
67	-	OthersTextSizeThickness=0.15
68	-	OthersTextItalic=0
69	-	OthersTextUpright=1
70	-	SolderMaskClearance=0
71	-	SolderMaskMinWidth=0
72	-	SolderPasteClearance=0
73	-	SolderPasteRatio=-0
74	-	[pcbnew/Layer.F.Cu]
75	-	Name=F.Cu
76	-	Type=0
77	-	Enabled=1
78	-	[pcbnew/Layer.In1.Cu]
79	-	Name=GND
80	-	Type=1
81	-	Enabled=1
82	-	[pcbnew/Layer.In2.Cu]
83	-	Name=VCC
84	-	Type=1
85	-	Enabled=1
86	-	[pcbnew/Layer.In3.Cu]
87	-	Name=In3.Cu
88	-	Type=0
89	-	Enabled=0
90	-	[pcbnew/Layer.In4.Cu]
91	-	Name=In4.Cu
92	-	Type=0
93	-	Enabled=0
94	-	[pcbnew/Layer.In5.Cu]
95	-	Name=In5.Cu
96	-	Type=0
97	-	Enabled=0
98	-	[pcbnew/Layer.In6.Cu]
99	-	Name=In6.Cu
100	-	Type=0
101	-	Enabled=0
102	-	[pcbnew/Layer.In7.Cu]
103	-	Name=In7.Cu
104	-	Type=0
105	-	Enabled=0
106	-	[pcbnew/Layer.In8.Cu]
107	-	Name=In8.Cu
108	-	Type=0
109	-	Enabled=0
110	-	[pcbnew/Layer.In9.Cu]
111	-	Name=In9.Cu
112	-	Type=0
113	-	Enabled=0
114	-	[pcbnew/Layer.In10.Cu]
115	-	Name=In10.Cu
116	-	Type=0
117	-	Enabled=0
118	-	[pcbnew/Layer.In11.Cu]
119	-	Name=In11.Cu
120	-	Type=0
121	-	Enabled=0
122	-	[pcbnew/Layer.In12.Cu]
123	-	Name=In12.Cu
124	-	Type=0
125	-	Enabled=0
126	-	[pcbnew/Layer.In13.Cu]
127	-	Name=In13.Cu
128	-	Type=0
129	-	Enabled=0
130	-	[pcbnew/Layer.In14.Cu]
131	-	Name=In14.Cu
132	-	Type=0
133	-	Enabled=0
134	-	[pcbnew/Layer.In15.Cu]
135	-	Name=In15.Cu
136	-	Type=0
137	-	Enabled=0
138	-	[pcbnew/Layer.In16.Cu]
139	-	Name=In16.Cu
140	-	Type=0
141	-	Enabled=0
142	-	[pcbnew/Layer.In17.Cu]
143	-	Name=In17.Cu
144	-	Type=0
145	-	Enabled=0
146	-	[pcbnew/Layer.In18.Cu]
147	-	Name=In18.Cu
148	-	Type=0
149	-	Enabled=0
150	-	[pcbnew/Layer.In19.Cu]
151	-	Name=In19.Cu
152	-	Type=0
153	-	Enabled=0
154	-	[pcbnew/Layer.In20.Cu]
155	-	Name=In20.Cu
156	-	Type=0
157	-	Enabled=0
158	-	[pcbnew/Layer.In21.Cu]
159	-	Name=In21.Cu
160	-	Type=0
161	-	Enabled=0
162	-	[pcbnew/Layer.In22.Cu]
163	-	Name=In22.Cu
164	-	Type=0
165	-	Enabled=0
166	-	[pcbnew/Layer.In23.Cu]
167	-	Name=In23.Cu
168	-	Type=0
169	-	Enabled=0
170	-	[pcbnew/Layer.In24.Cu]
171	-	Name=In24.Cu
172	-	Type=0
173	-	Enabled=0
174	-	[pcbnew/Layer.In25.Cu]
175	-	Name=In25.Cu
176	-	Type=0
177	-	Enabled=0
178	-	[pcbnew/Layer.In26.Cu]
179	-	Name=In26.Cu
180	-	Type=0
181	-	Enabled=0
182	-	[pcbnew/Layer.In27.Cu]
183	-	Name=In27.Cu
184	-	Type=0
185	-	Enabled=0
186	-	[pcbnew/Layer.In28.Cu]
187	-	Name=In28.Cu
188	-	Type=0
189	-	Enabled=0
190	-	[pcbnew/Layer.In29.Cu]
191	-	Name=In29.Cu
192	-	Type=0
193	-	Enabled=0
194	-	[pcbnew/Layer.In30.Cu]
195	-	Name=In30.Cu
196	-	Type=0
197	-	Enabled=0
198	-	[pcbnew/Layer.B.Cu]
199	-	Name=B.Cu
200	-	Type=0
201	-	Enabled=1
202	-	[pcbnew/Layer.B.Adhes]
203	-	Enabled=1
204	-	[pcbnew/Layer.F.Adhes]
205	-	Enabled=1
206	-	[pcbnew/Layer.B.Paste]
207	-	Enabled=1
208	-	[pcbnew/Layer.F.Paste]
209	-	Enabled=1
210	-	[pcbnew/Layer.B.SilkS]
211	-	Enabled=1
212	-	[pcbnew/Layer.F.SilkS]
213	-	Enabled=1
214	-	[pcbnew/Layer.B.Mask]
215	-	Enabled=1
216	-	[pcbnew/Layer.F.Mask]
217	-	Enabled=1
218	-	[pcbnew/Layer.Dwgs.User]
219	-	Enabled=1
220	-	[pcbnew/Layer.Cmts.User]
221	-	Enabled=1
222	-	[pcbnew/Layer.Eco1.User]
223	-	Enabled=1
224	-	[pcbnew/Layer.Eco2.User]
225	-	Enabled=1
226	-	[pcbnew/Layer.Edge.Cuts]
227	-	Enabled=1
228	-	[pcbnew/Layer.Margin]
229	-	Enabled=1
230	-	[pcbnew/Layer.B.CrtYd]
231	-	Enabled=1
232	-	[pcbnew/Layer.F.CrtYd]
233	-	Enabled=1
234	-	[pcbnew/Layer.B.Fab]
235	-	Enabled=1
236	-	[pcbnew/Layer.F.Fab]
237	-	Enabled=1
238	-	[pcbnew/Layer.Rescue]
239	-	Enabled=0
240	-	[pcbnew/Netclasses]
241	-	[pcbnew/Netclasses/Default]
242	-	Name=Default
243	-	Clearance=0.15
244	-	TrackWidth=0.25
245	-	ViaDiameter=0.8
246	-	ViaDrill=0.4
247	-	uViaDiameter=0.3
248	-	uViaDrill=0.1
249	-	dPairWidth=0.2032
250	-	dPairGap=0.25
251	-	dPairViaGap=0.25
252	-

hardware/CatSniffer.sch

Diff is too large to be displayed.

■ ■ ■ ■ ■ ■

hardware/CatStick.pro

1	-	update=22/05/2015 07:44:53
2	-	version=1
3	-	last_client=kicad
4	-	[general]
5	-	version=1
6	-	RootSch=
7	-	BoardNm=
8	-	[pcbnew]
9	-	version=1
10	-	LastNetListRead=
11	-	UseCmpFile=1
12	-	PadDrill=0.600000000000
13	-	PadDrillOvalY=0.600000000000
14	-	PadSizeH=1.500000000000
15	-	PadSizeV=1.500000000000
16	-	PcbTextSizeV=1.500000000000
17	-	PcbTextSizeH=1.500000000000
18	-	PcbTextThickness=0.300000000000
19	-	ModuleTextSizeV=1.000000000000
20	-	ModuleTextSizeH=1.000000000000
21	-	ModuleTextSizeThickness=0.150000000000
22	-	SolderMaskClearance=0.000000000000
23	-	SolderMaskMinWidth=0.000000000000
24	-	DrawSegmentWidth=0.200000000000
25	-	BoardOutlineThickness=0.100000000000
26	-	ModuleOutlineThickness=0.150000000000
27	-	[cvpcb]
28	-	version=1
29	-	NetIExt=net
30	-	[eeschema]
31	-	version=1
32	-	LibDir=
33	-	[eeschema/libraries]
34	-

■ ■ ■ ■ ■ ■

hardware/RFSW6062SR/RFSW6062SR.lib

1	-	EESchema-LIBRARY Version 2.3
2	-	#encoding utf-8
3	-	#(c) SnapEDA 2016 (snapeda.com)
4	-	#This work is licensed under a Creative Commons Attribution-ShareAlike 4.0 International License (CC BY-SA) with Design Exception 1.0
5	-	#
6	-	# RFSW6062SR
7	-	#
8	-	DEF RFSW6062SR U 0 40 Y Y 1 L N
9	-	F0 "U" -706 745 50 H V L BNN
10	-	F1 "RFSW6062SR" -705 -863 50 H V L BNN
11	-	F2 "QFN40P200X200X60-15N" 0 0 50 H I L BNN
12	-	F3 "IC RF SWITCH SPDT 20LGA" 0 0 50 H I L BNN
13	-	F4 "Qorvo" 0 0 50 H I L BNN
14	-	F5 "Good" 0 0 50 H I L BNN
15	-	DRAW
16	-	P 2 0 0 16 -600 700 600 700 N
17	-	P 2 0 0 16 600 700 600 -700 N
18	-	P 2 0 0 16 600 -700 -600 -700 N
19	-	P 2 0 0 16 -600 -700 -600 700 N
20	-	X CTRL1 3 -800 400 200 R 40 40 0 0 I
21	-	X CTRL2 2 -800 300 200 R 40 40 0 0 I
22	-	X RF1 11 -800 -100 200 R 40 40 0 0 B
23	-	X RF2 12 -800 -200 200 R 40 40 0 0 B
24	-	X RF5 6 800 -200 200 L 40 40 0 0 B
25	-	X VDD 4 800 600 200 L 40 40 0 0 W
26	-	X GND 8 800 -500 200 L 40 40 0 0 W
27	-	X GND 10 800 -500 200 L 40 40 0 0 W
28	-	X GND 14 800 -500 200 L 40 40 0 0 W
29	-	X EXP 15 800 -600 200 L 40 40 0 0 W
30	-	X CTRL3 1 -800 200 200 R 40 40 0 0 I
31	-	X RF3 13 -800 -300 200 R 40 40 0 0 B
32	-	X RF4 7 800 -100 200 L 40 40 0 0 B
33	-	X RF6 5 800 -300 200 L 40 40 0 0 B
34	-	X ANT 9 800 300 200 L 40 40 0 0 B
35	-	ENDDRAW
36	-	ENDDEF
37	-	#
38	-	# End Library

■ ■ ■ ■ ■ ■

hardware/SX1262IMLTRT.lib

1	-	EESchema-LIBRARY Version 2.3
2	-	#encoding utf-8
3	-	#(c) SnapEDA 2016 (snapeda.com)
4	-	#This work is licensed under a Creative Commons Attribution-ShareAlike 4.0 International License (CC BY-SA) with Design Exception 1.0
5	-	#
6	-	# SX1262IMLTRT
7	-	#
8	-	DEF SX1262IMLTRT U 0 40 Y Y 1 L N
9	-	F0 "U" -600 1130 50 H V L BNN
10	-	F1 "SX1262IMLTRT" -600 -1300 50 H V L BNN
11	-	F2 "QFN50P400X400X100-25N" 0 0 50 H I L BNN
12	-	F3 "" 0 0 50 H I L BNN
13	-	F4 "1.1" 0 0 50 H I L BNN "PARTREV"
14	-	F5 "IPC-7351B" 0 0 50 H I L BNN "STANDARD"
15	-	F6 "Semtech" 0 0 50 H I L BNN "MANUFACTURER"
16	-	DRAW
17	-	S -600 -1200 600 1100 0 0 10 f
18	-	X EXP 25 800 -1000 200 L 40 40 0 0 W
19	-	X VDD_IN 1 -800 600 200 R 40 40 0 0 I
20	-	X GND 2 800 -1100 200 L 40 40 0 0 W
21	-	X GND 5 800 -1100 200 L 40 40 0 0 W
22	-	X GND 8 800 -1100 200 L 40 40 0 0 W
23	-	X GND 20 800 -1100 200 L 40 40 0 0 W
24	-	X XTA 3 -800 -700 200 R 40 40 0 0 B
25	-	X XTB 4 -800 -800 200 R 40 40 0 0 B
26	-	X DIO3 6 800 -600 200 L 40 40 0 0 B
27	-	X VREG 7 800 600 200 L 40 40 0 0 O
28	-	X DCC_SW 9 800 100 200 L 40 40 0 0 O
29	-	X VBAT 10 800 900 200 L 40 40 0 0 W
30	-	X VBAT_IO 11 800 800 200 L 40 40 0 0 W
31	-	X DIO2 12 800 -500 200 L 40 40 0 0 B
32	-	X DIO1 13 800 -400 200 L 40 40 0 0 B
33	-	X BUSY 14 -800 -500 200 R 40 40 0 0 B
34	-	X ~NRESET 15 -800 -400 200 R 40 40 0 0 B
35	-	X MISO 16 -800 -100 200 R 40 40 0 0 O
36	-	X MOSI 17 -800 -200 200 R 40 40 0 0 I
37	-	X SCK 18 -800 0 200 R 40 40 0 0 I C
38	-	X NSS 19 -800 100 200 R 40 40 0 0 I
39	-	X RFI_P 21 -800 400 200 R 40 40 0 0 I
40	-	X RFI_N 22 -800 300 200 R 40 40 0 0 I
41	-	X RFO 23 800 400 200 L 40 40 0 0 O
42	-	X VR_PA 24 800 1000 200 L 40 40 0 0 W
43	-	ENDDRAW
44	-	ENDDEF
45	-	#
46	-	# End Library

erase extra files