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1d4a15b2
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rflib
/
chipcondefs.py
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vstruct
RadioConfig
(vstruct.VStruct)
sync1
sync0
pktlen
pktctrl1
pktctrl0
addr
channr
fsctrl1
fsctrl0
freq2
freq1
freq0
mdmcfg4
mdmcfg3
mdmcfg2
mdmcfg1
mdmcfg0
deviatn
mcsm2
mcsm1
mcsm0
foccfg
bscfg
agcctrl2
agcctrl1
agcctrl0
frend1
frend0
fscal3
fscal2
fscal1
fscal0
z0
z1
z2
test2
test1
test0
z3
pa_table7
pa_table6
pa_table5
pa_table4
pa_table3
pa_table2
pa_table1
pa_table0
iocfg2
iocfg1
iocfg0
z4
z5
z6
z7
partnum
chipid
freqest
lqi
rssi
marcstate
pkstatus
vco_vc_dac
__init__
(self)
AC
ACC
ACC_0
ACC_1
ACC_2
ACC_3
ACC_4
ACC_5
ACC_6
ACC_7
ACTIVE
ADCCFG
ADCCFG_0
ADCCFG_1
ADCCFG_2
ADCCFG_3
ADCCFG_4
ADCCFG_5
ADCCFG_6
ADCCFG_7
ADCCON1
ADCCON1_EOC
ADCCON1_RCTRL
ADCCON1_RCTRL0
ADCCON1_RCTRL1
ADCCON1_RCTRL_COMPL
ADCCON1_RCTRL_LFSR13
ADCCON1_ST
ADCCON1_STSEL
ADCCON1_STSEL0
ADCCON1_STSEL1
ADCCON2
ADCCON2_ECH
ADCCON2_ECH0
ADCCON2_ECH1
ADCCON2_ECH2
ADCCON2_ECH3
ADCCON2_SCH
ADCCON2_SCH0
ADCCON2_SCH1
ADCCON2_SCH2
ADCCON2_SCH3
ADCCON2_SCH_AIN0
ADCCON2_SCH_AIN0_1
ADCCON2_SCH_AIN1
ADCCON2_SCH_AIN2
ADCCON2_SCH_AIN2_3
ADCCON2_SCH_AIN3
ADCCON2_SCH_AIN4
ADCCON2_SCH_AIN4_5
ADCCON2_SCH_AIN5
ADCCON2_SCH_AIN6
ADCCON2_SCH_AIN6_7
ADCCON2_SCH_AIN7
ADCCON2_SCH_GND
ADCCON2_SCH_POSVOL
ADCCON2_SCH_TEMPR
ADCCON2_SCH_VDD_3
ADCCON2_SDIV
ADCCON2_SDIV0
ADCCON2_SDIV1
ADCCON2_SDIV_128
ADCCON2_SDIV_256
ADCCON2_SDIV_512
ADCCON2_SDIV_64
ADCCON2_SREF
ADCCON2_SREF0
ADCCON2_SREF1
ADCCON2_SREF_1_25V
ADCCON2_SREF_AVDD
ADCCON2_SREF_P0_6_P0_7
ADCCON2_SREF_P0_7
ADCCON3
ADCCON3_ECH_AIN0
ADCCON3_ECH_AIN0_1
ADCCON3_ECH_AIN1
ADCCON3_ECH_AIN2
ADCCON3_ECH_AIN2_3
ADCCON3_ECH_AIN3
ADCCON3_ECH_AIN4
ADCCON3_ECH_AIN4_5
ADCCON3_ECH_AIN5
ADCCON3_ECH_AIN6
ADCCON3_ECH_AIN6_7
ADCCON3_ECH_AIN7
ADCCON3_ECH_GND
ADCCON3_ECH_POSVOL
ADCCON3_ECH_TEMPR
ADCCON3_ECH_VDD_3
ADCCON3_EDIV
ADCCON3_EDIV0
ADCCON3_EDIV1
ADCCON3_EDIV_128
ADCCON3_EDIV_256
ADCCON3_EDIV_512
ADCCON3_EDIV_64
ADCCON3_EREF
ADCCON3_EREF0
ADCCON3_EREF1
ADCCON3_EREF_1_25V
ADCCON3_EREF_AVDD
ADCCON3_EREF_P0_6_P0_7
ADCCON3_EREF_P0_7
ADCH
ADCIE
ADCIF
ADCL
ADC_VECTOR
ADDR
ADR_CHK_0_255_BRDCST
ADR_CHK_0_BRDCST
ADR_CHK_NONE
ADR_CHK_NO_BRDCST
AGCCTRL0
AGCCTRL0_AGC_FREEZE
AGCCTRL0_FILTER_LENGTH
AGCCTRL0_HYST_LEVEL
AGCCTRL0_WAIT_TIME
AGCCTRL1
AGCCTRL1_AGC_LNA_PRIORITY
AGCCTRL1_CARRIER_SENSE_ABS_THR
AGCCTRL1_CARRIER_SENSE_REL_THR
AGCCTRL2
AGCCTRL2_MAGN_TARGET
AGCCTRL2_MAX_DVGA_GAIN
AGCCTRL2_MAX_LNA_GAIN
B
BSCFG
BSCFG_BS_LIMIT
BSCFG_BS_LIMIT0
BSCFG_BS_LIMIT1
BSCFG_BS_LIMIT_0
BSCFG_BS_LIMIT_12
BSCFG_BS_LIMIT_3
BSCFG_BS_LIMIT_6
BSCFG_BS_POST_KI
BSCFG_BS_POST_KP
BSCFG_BS_PRE_KI
BSCFG_BS_PRE_KI0
BSCFG_BS_PRE_KI1
BSCFG_BS_PRE_KI_1K
BSCFG_BS_PRE_KI_2K
BSCFG_BS_PRE_KI_3K
BSCFG_BS_PRE_KI_4K
BSCFG_BS_PRE_KP
BSCFG_BS_PRE_KP0
BSCFG_BS_PRE_KP1
BSCFG_BS_PRE_KP_1K
BSCFG_BS_PRE_KP_2K
BSCFG_BS_PRE_KP_3K
BSCFG_BS_PRE_KP_4K
B_0
B_1
B_2
B_3
B_4
B_5
B_6
B_7
CHANNR
CLKCON
CLKCON_CLKSPD
CLKCON_CLKSPD0
CLKCON_CLKSPD1
CLKCON_CLKSPD2
CLKCON_OSC
CLKCON_OSC32
CLKCON_TICKSPD
CLKCON_TICKSPD0
CLKCON_TICKSPD1
CLKCON_TICKSPD2
CLKSPD_DIV_1
CLKSPD_DIV_128
CLKSPD_DIV_16
CLKSPD_DIV_2
CLKSPD_DIV_32
CLKSPD_DIV_4
CLKSPD_DIV_64
CLKSPD_DIV_8
CY
DEVIATN
DEVIATN_DEVIATION_E
DEVIATN_DEVIATION_E0
DEVIATN_DEVIATION_E1
DEVIATN_DEVIATION_E2
DEVIATN_DEVIATION_M
DEVIATN_DEVIATION_M0
DEVIATN_DEVIATION_M1
DEVIATN_DEVIATION_M2
DMA0CFGH
DMA0CFGL
DMA1CFGH
DMA1CFGL
DMAARM
DMAARM0
DMAARM1
DMAARM2
DMAARM3
DMAARM4
DMAARM_ABORT
DMAIE
DMAIF
DMAIRQ
DMAIRQ_DMAIF0
DMAIRQ_DMAIF1
DMAIRQ_DMAIF2
DMAIRQ_DMAIF3
DMAIRQ_DMAIF4
DMAREQ
DMAREQ0
DMAREQ1
DMAREQ2
DMAREQ3
DMAREQ4
DMA_VECTOR
DPH0
DPH1
DPL0
DPL1
DPS
DPS_VDPS
DSM_IP_OFF_OS_OFF
DSM_IP_OFF_OS_ON
DSM_IP_ON_OS_OFF
DSM_IP_ON_OS_ON
EA
ENCCS
ENCCS_CMD
ENCCS_CMD0
ENCCS_CMD1
ENCCS_CMD_DEC
ENCCS_CMD_ENC
ENCCS_CMD_LDIV
ENCCS_CMD_LDKEY
ENCCS_MODE
ENCCS_MODE0
ENCCS_MODE1
ENCCS_MODE2
ENCCS_MODE_CBC
ENCCS_MODE_CBCMAC
ENCCS_MODE_CFB
ENCCS_MODE_CTR
ENCCS_MODE_ECB
ENCCS_MODE_OFB
ENCCS_RDY
ENCCS_ST
ENCDI
ENCDO
ENCIE
ENCIF_0
ENCIF_1
ENC_VECTOR
EP_STATE_IDLE
EP_STATE_RX
EP_STATE_STALL
EP_STATE_TX
ERR
F0
F1
FADDRH
FADDRL
FCTL
FCTL_BUSY
FCTL_CONTRD
FCTL_ERASE
FCTL_SWBSY
FCTL_WRITE
FE
FOCCFG
FOCCFG_FOC_BS_CS_GATE
FOCCFG_FOC_LIMIT
FOCCFG_FOC_LIMIT0
FOCCFG_FOC_LIMIT1
FOCCFG_FOC_POST_K
FOCCFG_FOC_PRE_K
FOCCFG_FOC_PRE_K0
FOCCFG_FOC_PRE_K1
FOC_LIMIT_0
FOC_LIMIT_DIV2
FOC_LIMIT_DIV4
FOC_LIMIT_DIV8
FOC_PRE_K_1K
FOC_PRE_K_2K
FOC_PRE_K_3K
FOC_PRE_K_4K
FREND0
FREND0_LODIV_BUF_CURRENT_TX
FREND0_PA_POWER
FREND1
FREND1_LNA2MIX_CURRENT
FREND1_LNA_CURRENT
FREND1_LODIV_BUF_CURRENT_RX
FREND1_MIX_CURRENT
FREQ0
FREQ1
FREQ2
FREQEST
FSCAL0
FSCAL1
FSCAL2
FSCAL2_FSCAL2
FSCAL2_VCO_CORE_H_EN
FSCAL3
FSCAL3_CHP_CURR_CAL_EN
FSCAL3_FSCAL3
FSCTRL0
FSCTRL1
FS_AUTOCAL_4TH_TO_IDLE
FS_AUTOCAL_FROM_IDLE
FS_AUTOCAL_NEVER
FS_AUTOCAL_TO_IDLE
FWDATA
FWT
I2SCFG0
I2SCFG0_ENAB
I2SCFG0_MASTER
I2SCFG0_RXIEN
I2SCFG0_RXMONO
I2SCFG0_TXIEN
I2SCFG0_TXMONO
I2SCFG0_ULAWC
I2SCFG0_ULAWE
I2SCFG1
I2SCFG1_IOLOC
I2SCFG1_TRIGNUM
I2SCFG1_TRIGNUM0
I2SCFG1_TRIGNUM1
I2SCFG1_TRIGNUM_IOC_1
I2SCFG1_TRIGNUM_NO_TRIG
I2SCFG1_TRIGNUM_T1_CH0
I2SCFG1_TRIGNUM_USB_SOF
I2SCFG1_WORDS
I2SCFG1_WORDS0
I2SCFG1_WORDS1
I2SCFG1_WORDS2
I2SCFG1_WORDS3
I2SCFG1_WORDS4
I2SCLKF0
I2SCLKF1
I2SCLKF2
I2SDATH
I2SDATL
I2SSTAT
I2SSTAT_RXIRQ
I2SSTAT_RXLR
I2SSTAT_RXOVF
I2SSTAT_TXIRQ
I2SSTAT_TXLR
I2SSTAT_TXUNF
I2SSTAT_WCNT
I2SSTAT_WCNT0
I2SSTAT_WCNT1
I2SSTAT_WCNT_10BIT
I2SSTAT_WCNT_9BIT
I2SSTAT_WCNT_9_10BIT
I2SWCNT
IEN0
IEN1
IEN2
IEN2_I2STXIE
IEN2_P1IE
IEN2_P2IE
IEN2_RFIE
IEN2_USBIE
IEN2_UTX0IE
IEN2_UTX1IE
IEN2_WDTIE
IOCFG0
IOCFG0_GDO0_CFG
IOCFG0_GDO0_INV
IOCFG1
IOCFG1_GDO1_CFG
IOCFG1_GDO1_INV
IOCFG1_GDO_DS
IOCFG2
IOCFG2_GDO2_CFG
IOCFG2_GDO2_INV
IP0
IP0_IPG0
IP0_IPG1
IP0_IPG2
IP0_IPG3
IP0_IPG4
IP0_IPG5
IP1
IP1_IPG0
IP1_IPG1
IP1_IPG2
IP1_IPG3
IP1_IPG4
IP1_IPG5
IRCON
IRCON2
IT0
IT1
LED_MODE_OFF
LED_MODE_ON
LQI
MARCSTATE
MARCSTATE_MARC_STATE
MARC_STATE_BWBOOST
MARC_STATE_ENDCAL
MARC_STATE_FSTXON
MARC_STATE_FS_LOCK
MARC_STATE_IDLE
MARC_STATE_IFADCON
MARC_STATE_MANCAL
MARC_STATE_REGON
MARC_STATE_REGON_MC
MARC_STATE_RX
MARC_STATE_RXTX_SWITCH
MARC_STATE_RX_END
MARC_STATE_RX_OVERFLOW
MARC_STATE_RX_RST
MARC_STATE_SLEEP
MARC_STATE_STARTCAL
MARC_STATE_TX
MARC_STATE_TXRX_SWITCH
MARC_STATE_TX_END
MARC_STATE_TX_UNDERFLOW
MARC_STATE_VCOON
MARC_STATE_VCOON_MC
MCSM0
MCSM0_FS_AUTOCAL
MCSM1
MCSM1_CCA_MODE
MCSM1_CCA_MODE0
MCSM1_CCA_MODE1
MCSM1_CCA_MODE_ALWAYS
MCSM1_CCA_MODE_PACKET
MCSM1_CCA_MODE_RSSI0
MCSM1_CCA_MODE_RSSI1
MCSM1_RXOFF_MODE
MCSM1_RXOFF_MODE0
MCSM1_RXOFF_MODE1
MCSM1_RXOFF_MODE_FSTXON
MCSM1_RXOFF_MODE_IDLE
MCSM1_RXOFF_MODE_RX
MCSM1_RXOFF_MODE_TX
MCSM1_TXOFF_MODE
MCSM1_TXOFF_MODE0
MCSM1_TXOFF_MODE1
MCSM1_TXOFF_MODE_FSTXON
MCSM1_TXOFF_MODE_IDLE
MCSM1_TXOFF_MODE_RX
MCSM1_TXOFF_MODE_TX
MCSM2
MCSM2_RX_TIME
MCSM2_RX_TIME_QUAL
MCSM2_RX_TIME_RSSI
MDMCFG0
MDMCFG1
MDMCFG1_CHANSPC_E
MDMCFG2
MDMCFG2_DEM_DCFILT_OFF
MDMCFG2_MANCHESTER_EN
MDMCFG2_MOD_FORMAT
MDMCFG2_MOD_FORMAT0
MDMCFG2_MOD_FORMAT1
MDMCFG2_MOD_FORMAT2
MDMCFG2_SYNC_MODE
MDMCFG2_SYNC_MODE0
MDMCFG2_SYNC_MODE1
MDMCFG2_SYNC_MODE2
MDMCFG3
MDMCFG4
MDMCFG4_CHANBW_E
MDMCFG4_CHANBW_M
MDMCFG4_DRATE_E
MFMCFG1_CHANSPC_E
MFMCFG1_CHANSPC_E0
MFMCFG1_CHANSPC_E1
MFMCFG1_FEC_EN
MFMCFG1_NUM_PREAMBLE
MFMCFG1_NUM_PREAMBLE0
MFMCFG1_NUM_PREAMBLE1
MFMCFG1_NUM_PREAMBLE2
MFMCFG1_NUM_PREAMBLE_12
MFMCFG1_NUM_PREAMBLE_16
MFMCFG1_NUM_PREAMBLE_2
MFMCFG1_NUM_PREAMBLE_24
MFMCFG1_NUM_PREAMBLE_3
MFMCFG1_NUM_PREAMBLE_4
MFMCFG1_NUM_PREAMBLE_6
MFMCFG1_NUM_PREAMBLE_8
MDMCTRL0H
MEMCTR
MEMCTR_CACHD
MEMCTR_PREFD
MODE
MOD_FORMAT_2_FSK
MOD_FORMAT_GFSK
MOD_FORMAT_MSK
MPAGE
OV
OVFIM
P
P0
P0DIR
P0IE
P0IF
P0IFG
P0IFG_USB_RESUME
P0INP
P0INT_VECTOR
P0SEL
P0_0
P0_1
P0_2
P0_3
P0_4
P0_5
P0_6
P0_7
P1
P1DIR
P1IEN
P1IF
P1IFG
P1INP
P1INT_VECTOR
P1SEL
P1_0
P1_1
P1_2
P1_3
P1_4
P1_5
P1_6
P1_7
P2
P2DIR
P2DIR_0PRIP0
P2DIR_1PRIP0
P2DIR_DIRP2
P2DIR_DIRP2_0
P2DIR_DIRP2_1
P2DIR_DIRP2_2
P2DIR_DIRP2_3
P2DIR_DIRP2_4
P2DIR_PRIP0
P2DIR_PRIP0_0
P2DIR_PRIP0_1
P2DIR_PRIP0_2
P2DIR_PRIP0_3
P2IF
P2IFG
P2INP
P2INP_MDP2
P2INP_MDP2_0
P2INP_MDP2_1
P2INP_MDP2_2
P2INP_MDP2_3
P2INP_MDP2_4
P2INP_PDUP0
P2INP_PDUP1
P2INP_PDUP2
P2INT_VECTOR
P2SEL
P2SEL_PRI0P1
P2SEL_PRI1P1
P2SEL_PRI2P1
P2SEL_PRI3P1
P2SEL_SELP2_0
P2SEL_SELP2_3
P2SEL_SELP2_4
P2_0
P2_1
P2_2
P2_3
P2_4
P2_5
P2_6
P2_7
PARTNUM
PA_TABLE0
PA_TABLE1
PA_TABLE2
PA_TABLE3
PA_TABLE4
PA_TABLE5
PA_TABLE6
PA_TABLE7
PCON
PCON_IDLE
PERCFG
PERCFG_T1CFG
PERCFG_T3CFG
PERCFG_T4CFG
PERCFG_U0CFG
PERCFG_U1CFG
PICTL
PICTL_P0ICON
PICTL_P0IENH
PICTL_P0IENL
PICTL_P1ICON
PICTL_P2ICON
PICTL_P2IEN
PICTL_PADSC
PKTCTRL0
PKTCTRL0_CC2400_EN
PKTCTRL0_CRC_EN
PKTCTRL0_LENGTH_CONFIG
PKTCTRL0_LENGTH_CONFIG0
PKTCTRL0_LENGTH_CONFIG_FIX
PKTCTRL0_LENGTH_CONFIG_VAR
PKTCTRL0_PKT_FORMAT
PKTCTRL0_PKT_FORMAT0
PKTCTRL0_PKT_FORMAT1
PKTCTRL0_WHITE_DATA
PKTCTRL1
PKTCTRL1_ADR_CHK
PKTCTRL1_ADR_CHK0
PKTCTRL1_ADR_CHK1
PKTCTRL1_APPEND_STATUS
PKTCTRL1_PQT
PKTCTRL1_PQT0
PKTCTRL1_PQT1
PKTCTRL1_PQT2
PKTLEN
PKTSTATUS
PKT_FORMAT_NORM
PKT_FORMAT_RAND
PSW
RE
RFD
RFIF
RFIF_IRQ_CCA
RFIF_IRQ_CS
RFIF_IRQ_DONE
RFIF_IRQ_PQT
RFIF_IRQ_RXOVF
RFIF_IRQ_SFD
RFIF_IRQ_TIMEOUT
RFIF_IRQ_TXUNF
RFIM
RFIM_IM_CCA
RFIM_IM_CS
RFIM_IM_DONE
RFIM_IM_PQT
RFIM_IM_RXOVF
RFIM_IM_SFD
RFIM_IM_TIMEOUT
RFIM_IM_TXUNF
RFST
RFST_SCAL
RFST_SFSTXON
RFST_SIDLE
RFST_SNOP
RFST_SRX
RFST_STX
RFTXRXIE
RFTXRXIF
RFTXRX_VECTOR
RF_VECTOR
RNDH
RNDL
RS0
RS1
RSSI
RX_BYTE
S0CON
S1CON
S1CON_RFIF_0
S1CON_RFIF_1
SLAVE
SLEEP
SLEEP_HFRC_S
SLEEP_MODE
SLEEP_MODE0
SLEEP_MODE1
SLEEP_MODE_PM0
SLEEP_MODE_PM1
SLEEP_MODE_PM2
SLEEP_MODE_PM3
SLEEP_OSC_PD
SLEEP_RST
SLEEP_RST0
SLEEP_RST1
SLEEP_RST_EXT
SLEEP_RST_POR_BOD
SLEEP_RST_WDT
SLEEP_USB_EN
SLEEP_XOSC_S
SP
STIE
STIF
STSEL_FULL_SPEED
STSEL_P2_0
STSEL_ST
STSEL_T1C0_CMP_EVT
ST_VECTOR
SYNC0
SYNC1
SYNC_MODE_15_16
SYNC_MODE_15_16_CS
SYNC_MODE_16_16
SYNC_MODE_16_16_CS
SYNC_MODE_30_32
SYNC_MODE_30_32_CS
SYNC_MODE_NO_PRE
SYNC_MODE_NO_PRE_CS
T1C0_BOTH_EDGE
T1C0_CLR_CMP_UP_SET_0
T1C0_CLR_ON_CMP
T1C0_FALL_EDGE
T1C0_NO_CAP
T1C0_RISE_EDGE
T1C0_SET_CMP_UP_CLR_0
T1C0_SET_ON_CMP
T1C0_TOG_ON_CMP
T1C1_BOTH_EDGE
T1C1_CLR_C1_SET_C0
T1C1_CLR_CMP_UP_SET_0
T1C1_CLR_ON_CMP
T1C1_DSM_MODE
T1C1_FALL_EDGE
T1C1_NO_CAP
T1C1_RISE_EDGE
T1C1_SET_C1_CLR_C0
T1C1_SET_CMP_UP_CLR_0
T1C1_SET_ON_CMP
T1C1_TOG_ON_CMP
T1C2_BOTH_EDGE
T1C2_CLR_C2_SET_C0
T1C2_CLR_CMP_UP_SET_0
T1C2_CLR_ON_CMP
T1C2_FALL_EDGE
T1C2_NO_CAP
T1C2_RISE_EDGE
T1C2_SET_C2_CLR_C0
T1C2_SET_CMP_UP_CLR_0
T1C2_SET_ON_CMP
T1C2_TOG_ON_CMP
T1CC0H
T1CC0L
T1CC1H
T1CC1L
T1CC2H
T1CC2L
T1CCTL0
T1CCTL0_CAP
T1CCTL0_CAP0
T1CCTL0_CAP1
T1CCTL0_CMP
T1CCTL0_CMP0
T1CCTL0_CMP1
T1CCTL0_CMP2
T1CCTL0_CPSEL
T1CCTL0_IM
T1CCTL0_MODE
T1CCTL1
T1CCTL1_CAP
T1CCTL1_CAP0
T1CCTL1_CAP1
T1CCTL1_CMP
T1CCTL1_CMP0
T1CCTL1_CMP1
T1CCTL1_CMP2
T1CCTL1_CPSEL
T1CCTL1_DSM_SPD
T1CCTL1_IM
T1CCTL1_MODE
T1CCTL2
T1CCTL2_CAP
T1CCTL2_CAP0
T1CCTL2_CAP1
T1CCTL2_CMP
T1CCTL2_CMP0
T1CCTL2_CMP1
T1CCTL2_CMP2
T1CCTL2_CPSEL
T1CCTL2_IM
T1CCTL2_MODE
T1CNTH
T1CNTL
T1CTL
T1CTL_CH0IF
T1CTL_CH1IF
T1CTL_CH2IF
T1CTL_DIV
T1CTL_DIV0
T1CTL_DIV1
T1CTL_DIV_1
T1CTL_DIV_128
T1CTL_DIV_32
T1CTL_DIV_8
T1CTL_MODE
T1CTL_MODE0
T1CTL_MODE1
T1CTL_MODE_FREERUN
T1CTL_MODE_MODULO
T1CTL_MODE_SUSPEND
T1CTL_MODE_UPDOWN
T1CTL_OVFIF
T1IE
T1IF
T1_VECTOR
T2CT
T2CTL
T2CTL_INT
T2CTL_TEX
T2CTL_TIG
T2CTL_TIP
T2CTL_TIP0
T2CTL_TIP1
T2CTL_TIP_1024
T2CTL_TIP_128
T2CTL_TIP_256
T2CTL_TIP_64
T2IE
T2IF
T2PR
T2_VECTOR
T3C0_CLR_CMP_SET_0
T3C0_CLR_CMP_UP_SET_0
T3C0_CLR_ON_CMP
T3C0_SET_CMP_CLR_255
T3C0_SET_CMP_UP_CLR_0
T3C0_SET_ON_CMP
T3C0_TOG_ON_CMP
T3C1_CLR_CMP_SET_C0
T3C1_CLR_CMP_UP_SET_0
T3C1_CLR_ON_CMP
T3C1_SET_CMP_CLR_C0
T3C1_SET_CMP_UP_CLR_0
T3C1_SET_ON_CMP
T3C1_TOG_ON_CMP
T3CC0
T3CC1
T3CCTL0
T3CCTL0_CMP
T3CCTL0_CMP0
T3CCTL0_CMP1
T3CCTL0_CMP2
T3CCTL0_IM
T3CCTL0_MODE
T3CCTL1
T3CCTL1_CMP
T3CCTL1_CMP0
T3CCTL1_CMP1
T3CCTL1_CMP2
T3CCTL1_IM
T3CCTL1_MODE
T3CH0IF
T3CH1IF
T3CNT
T3CTL
T3CTL_CLR
T3CTL_DIV
T3CTL_DIV0
T3CTL_DIV1
T3CTL_DIV2
T3CTL_DIV_1
T3CTL_DIV_128
T3CTL_DIV_16
T3CTL_DIV_2
T3CTL_DIV_32
T3CTL_DIV_4
T3CTL_DIV_64
T3CTL_DIV_8
T3CTL_MODE
T3CTL_MODE0
T3CTL_MODE1
T3CTL_MODE_DOWN
T3CTL_MODE_FREERUN
T3CTL_MODE_MODULO
T3CTL_MODE_UPDOWN
T3CTL_OVFIM
T3CTL_START
T3IE
T3IF
T3OVFIF
T3_VECTOR
T4CC0
T4CC1
T4CCTL0
T4CCTL0_CLR_CMP_SET_0
T4CCTL0_CLR_CMP_UP_SET_0
T4CCTL0_CLR_ON_CMP
T4CCTL0_CMP
T4CCTL0_CMP0
T4CCTL0_CMP1
T4CCTL0_CMP2
T4CCTL0_IM
T4CCTL0_MODE
T4CCTL0_SET_CMP_CLR_255
T4CCTL0_SET_CMP_UP_CLR_0
T4CCTL0_SET_ON_CMP
T4CCTL0_TOG_ON_CMP
T4CCTL1
T4CCTL1_CLR_CMP_SET_C0
T4CCTL1_CLR_CMP_UP_SET_0
T4CCTL1_CLR_ON_CMP
T4CCTL1_CMP
T4CCTL1_CMP0
T4CCTL1_CMP1
T4CCTL1_CMP2
T4CCTL1_IM
T4CCTL1_MODE
T4CCTL1_SET_CMP_CLR_C0
T4CCTL1_SET_CMP_UP_CLR_0
T4CCTL1_SET_ON_CMP
T4CCTL1_TOG_ON_CMP
T4CH0IF
T4CH1IF
T4CNT
T4CTL
T4CTL_CLR
T4CTL_DIV
T4CTL_DIV0
T4CTL_DIV1
T4CTL_DIV2
T4CTL_DIV_1
T4CTL_DIV_128
T4CTL_DIV_16
T4CTL_DIV_2
T4CTL_DIV_32
T4CTL_DIV_4
T4CTL_DIV_64
T4CTL_DIV_8
T4CTL_MODE
T4CTL_MODE0
T4CTL_MODE1
T4CTL_MODE_DOWN
T4CTL_MODE_FREERUN
T4CTL_MODE_MODULO
T4CTL_MODE_UPDOWN
T4CTL_OVFIM
T4CTL_START
T4IE
T4IF
T4OVFIF
T4_VECTOR
TCON
TEST0
TEST1
TEST2
TICKSPD_DIV_1
TICKSPD_DIV_128
TICKSPD_DIV_16
TICKSPD_DIV_2
TICKSPD_DIV_32
TICKSPD_DIV_4
TICKSPD_DIV_64
TICKSPD_DIV_8
TIMIF
TX_BYTE
U0BAUD
U0CSR
U0CSR_ACTIVE
U0CSR_ERR
U0CSR_FE
U0CSR_MODE
U0CSR_RE
U0CSR_RX_BYTE
U0CSR_SLAVE
U0CSR_TX_BYTE
U0DBUF
U0GCR
U0GCR_BAUD_E
U0GCR_BAUD_E0
U0GCR_BAUD_E1
U0GCR_BAUD_E2
U0GCR_BAUD_E3
U0GCR_BAUD_E4
U0GCR_CPHA
U0GCR_CPOL
U0GCR_ORDER
U0UCR
U0UCR_BIT9
U0UCR_D9
U0UCR_FLOW
U0UCR_FLUSH
U0UCR_PARITY
U0UCR_SPB
U0UCR_START
U0UCR_STOP
U1BAUD
U1CSR
U1CSR_ACTIVE
U1CSR_ERR
U1CSR_FE
U1CSR_MODE
U1CSR_RE
U1CSR_RX_BYTE
U1CSR_SLAVE
U1CSR_TX_BYTE
U1DBUF
U1GCR
U1GCR_BAUD_E
U1GCR_BAUD_E0
U1GCR_BAUD_E1
U1GCR_BAUD_E2
U1GCR_BAUD_E3
U1GCR_BAUD_E4
U1GCR_CPHA
U1GCR_CPOL
U1GCR_ORDER
U1UCR
U1UCR_BIT9
U1UCR_D9
U1UCR_FLOW
U1UCR_FLUSH
U1UCR_PARITY
U1UCR_SPB
U1UCR_START
U1UCR_STOP
URX0IE
URX0IF
URX0_VECTOR
URX1IE
URX1IF
URX1_VECTOR
USBADDR
USBADDR_UPDATE
USBCIE
USBCIE_RESUMEIE
USBCIE_RSTIE
USBCIE_SOFIE
USBCIE_SUSPENDIE
USBCIF
USBCIF_RESUMEIF
USBCIF_RSTIF
USBCIF_SOFIF
USBCIF_SUSPENDIF
USBCNT0
USBCNTH
USBCNTL
USBCS0
USBCS0_CLR_OUTPKT_RDY
USBCS0_CLR_SETUP_END
USBCS0_DATA_END
USBCS0_INPKT_RDY
USBCS0_OUTPKT_RDY
USBCS0_SEND_STALL
USBCS0_SENT_STALL
USBCS0_SETUP_END
USBCSIH
USBCSIH_AUTOSET
USBCSIH_FORCE_DATA_TOG
USBCSIH_IN_DBL_BUF
USBCSIH_ISO
USBCSIL
USBCSIL_CLR_DATA_TOG
USBCSIL_FLUSH_PACKET
USBCSIL_INPKT_RDY
USBCSIL_PKT_PRESENT
USBCSIL_SEND_STALL
USBCSIL_SENT_STALL
USBCSIL_UNDERRUN
USBCSOH
USBCSOH_AUTOCLEAR
USBCSOH_ISO
USBCSOH_OUT_DBL_BUF
USBCSOL
USBCSOL_CLR_DATA_TOG
USBCSOL_DATA_ERROR
USBCSOL_FIFO_FULL
USBCSOL_FLUSH_PACKET
USBCSOL_OUTPKT_RDY
USBCSOL_OVERRUN
USBCSOL_SEND_STALL
USBCSOL_SENT_STALL
USBF0
USBF1
USBF2
USBF3
USBF4
USBF5
USBFRMH
USBFRML
USBIF
USBIIE
USBIIE_EP0IE
USBIIE_INEP1IE
USBIIE_INEP2IE
USBIIE_INEP3IE
USBIIE_INEP4IE
USBIIE_INEP5IE
USBIIF
USBIIF_EP0IF
USBIIF_INEP1IF
USBIIF_INEP2IF
USBIIF_INEP3IF
USBIIF_INEP4IF
USBIIF_INEP5IF
USBINDEX
USBMAXI
USBMAXO
USBOIE
USBOIE_EP1IE
USBOIE_EP2IE
USBOIE_EP3IE
USBOIE_EP4IE
USBOIE_EP5IE
USBOIF
USBOIF_OUTEP1IF
USBOIF_OUTEP2IF
USBOIF_OUTEP3IF
USBOIF_OUTEP4IF
USBOIF_OUTEP5IF
USBPOW
USBPOW_ISO_WAIT_SOF
USBPOW_RESUME
USBPOW_RST
USBPOW_SUSPEND
USBPOW_SUSPEND_EN
USB_BM_REQTYPE_DIRMASK
USB_BM_REQTYPE_DIR_IN
USB_BM_REQTYPE_DIR_OUT
USB_BM_REQTYPE_TGTMASK
USB_BM_REQTYPE_TGT_DEV
USB_BM_REQTYPE_TGT_EP
USB_BM_REQTYPE_TGT_INTF
USB_BM_REQTYPE_TYPEMASK
USB_BM_REQTYPE_TYPE_CLASS
USB_BM_REQTYPE_TYPE_RESERVED
USB_BM_REQTYPE_TYPE_STD
USB_BM_REQTYPE_TYPE_VENDOR
USB_CLEAR_FEATURE
USB_DESC_CONFIG
USB_DESC_DEVICE
USB_DESC_ENDPOINT
USB_DESC_INTERFACE
USB_DESC_STRING
USB_ENABLE_PIN
USB_GET_CONFIGURATION
USB_GET_DESCRIPTOR
USB_GET_INTERFACE
USB_GET_STATUS
USB_SET_ADDRESS
USB_SET_CONFIGURATION
USB_SET_DESCRIPTOR
USB_SET_FEATURE
USB_SET_INTERFACE
USB_STATE_BLINK
USB_STATE_IDLE
USB_STATE_RESET
USB_STATE_RESUME
USB_STATE_SUSPEND
USB_STATE_WAIT_ADDR
USB_SYNCH_FRAME
UTX0IF
UTX0_VECTOR
UTX1IF
UTX1_VECTOR
VCO_VC_DAC
VERSION
WDCTL
WDCTL_CLR
WDCTL_CLR0
WDCTL_CLR1
WDCTL_CLR2
WDCTL_CLR3
WDCTL_EN
WDCTL_INT
WDCTL_INT0
WDCTL_INT1
WDCTL_INT1_MSEC_250
WDCTL_INT2_MSEC_15
WDCTL_INT3_MSEC_2
WDCTL_INT_SEC_1
WDCTL_MODE
WDTIF
WDT_VECTOR
WORCTL_WOR_RES
WORCTL_WOR_RES0
WORCTL_WOR_RES1
WORCTL_WOR_RESET
WORCTL_WOR_RES_1
WORCTL_WOR_RES_1024
WORCTL_WOR_RES_32
WORCTL_WOR_RES_32768
WORCTRL
WOREVT0
WOREVT1
WORIRQ
WORIRQ_EVENT0_FLAG
WORIRQ_EVENT0_MASK
WORTIME0
WORTIME1
X_ADCCFG
X_ADCCON1
X_ADCCON2
X_ADCCON3
X_ADCH
X_ADCL
X_CLKCON
X_DMA0CFGH
X_DMA0CFGL
X_DMA1CFGH
X_DMA1CFGL
X_DMAARM
X_DMAIRQ
X_DMAREQ
X_ENCCS
X_ENCDI
X_ENCDO
X_FADDRH
X_FADDRL
X_FCTL
X_FWDATA
X_FWT
X_MEMCTR
X_MPAGE
X_P0DIR
X_P0IFG
X_P0INP
X_P0SEL
X_P1DIR
X_P1IEN
X_P1IFG
X_P1INP
X_P1SEL
X_P2DIR
X_P2IFG
X_P2INP
X_P2SEL
X_PERCFG
X_PICTL
X_RFD
X_RFIF
X_RFIM
X_RFST
X_RNDH
X_RNDL
X_SLEEP
X_T1CC0H
X_T1CC0L
X_T1CC1H
X_T1CC1L
X_T1CC2H
X_T1CC2L
X_T1CCTL0
X_T1CCTL1
X_T1CCTL2
X_T1CNTH
X_T1CNTL
X_T1CTL
X_T2CT
X_T2CTL
X_T2PR
X_T3CC0
X_T3CC1
X_T3CCTL0
X_T3CCTL1
X_T3CNT
X_T3CTL
X_T4CC0
X_T4CC1
X_T4CCTL0
X_T4CCTL1
X_T4CNT
X_T4CTL
X_TIMIF
X_U0BAUD
X_U0CSR
X_U0DBUF
X_U0GCR
X_U0UCR
X_U1BAUD
X_U1CSR
X_U1DBUF
X_U1GCR
X_U1UCR
X_WDCTL
X_WORCTRL
X_WOREVT0
X_WOREVT1
X_WORIRQ
X_WORTIME0
X_WORTIME1
AES_CRYPTO_MODE
AES_CRYPTO_OUT
AES_CRYPTO_OUT_ENABLE
AES_CRYPTO_OUT_ON
AES_CRYPTO_OUT_OFF
AES_CRYPTO_OUT_TYPE
AES_CRYPTO_OUT_DECRYPT
AES_CRYPTO_OUT_ENCRYPT
AES_CRYPTO_IN
AES_CRYPTO_IN_ENABLE
AES_CRYPTO_IN_ON
AES_CRYPTO_IN_OFF
AES_CRYPTO_IN_TYPE
AES_CRYPTO_IN_DECRYPT
AES_CRYPTO_IN_ENCRYPT
AES_CRYPTO_NONE
AES_CRYPTO_DEFAULT
AES_DISABLE
AES_ENABLE
AES_DECRYPT
AES_ENCRYPT
ADCCON1S
ADCCON2S
ADCCON3S
AGCCTRL0S
AGCCTRL1S
BSCFGS
CLKCONS
CLKSPDS
DEVIATNS
IEN0S
IEN1S
IEN2S
IOCFG0S
IOCFG1S
IOCFG2S
MARC_STATES
MCSM0S
MCSM1S
MCSM2S
MDMCFG2S
PKTCTRL0S
PKTCTRL1S
RFIFS
RFIMS
All occurrences
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